这里使用到的是**stm32f4**的板子
在一个空项目中编辑一个MakeFile文件
#########target 项目名称########TARGET = one######### building build配置######### debug build?DEBUG = 1# optimizationOPT = -Og######################################## paths 路径配置######################################## Build pathBUILD_DIR = build####################################### source 主文件的配置文件信息，需要配置的往这添加####################################### C sourcesC_SOURCES = \Core/Src/main.c \# ASM sources 不清楚，反正stm32的一系列配置信息ASM_SOURCES = \startup_stm32f407xx.s######################################## binaries#######################################PREFIX = arm-none-eabi-# The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx)# either it can be added to the PATH environment variable.ifdef GCC_PATHCC = $(GCC_PATH)/$(PREFIX)gccAS = $(GCC_PATH)/$(PREFIX)gcc -x assembler-with-cppCP = $(GCC_PATH)/$(PREFIX)objcopySZ = $(GCC_PATH)/$(PREFIX)sizeelseCC = $(PREFIX)gccAS = $(PREFIX)gcc -x assembler-with-cppCP = $(PREFIX)objcopySZ = $(PREFIX)sizeendifHEX = $(CP) -O ihexBIN = $(CP) -O binary -S######################################## CFLAGS######################################## cpuCPU = -mcpu=cortex-m4# fpuFPU = -mfpu=fpv4-sp-d16# float-abiFLOAT-ABI = -mfloat-abi=hard# mcuMCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)# macros for gcc# AS definesAS_DEFS =# C defines C的定义信息Shift+Ctrl+p进行配置C_DEFS = \-DUSE_HAL_DRIVER \-DSTM32F407xx# AS includesAS_INCLUDES =# C includesC_INCLUDES = \-ICore/Inc \-IDrivers/STM32F4xx_HAL_Driver/Inc \-IDrivers/STM32F4xx_HAL_Driver/Inc/Legacy \-IDrivers/CMSIS/Device/ST/STM32F4xx/Include \-IDrivers/CMSIS/Include# compile gcc flagsASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sectionsCFLAGS += $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sectionsifeq ($(DEBUG), 1)CFLAGS += -g -gdwarf-2endif# Generate dependency informationCFLAGS += -MMD -MP -MF"$(@:%.o=%.d)"######################################## LDFLAGS######################################## link scriptLDSCRIPT = STM32F407VETx_FLASH.ld# librariesLIBS = -lc -lm -lnosysLIBDIR =LDFLAGS = $(MCU) -specs=nano.specs -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections# default action: build allall: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin######################################## build the application######################################## list of objectsOBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o)))vpath %.c $(sort $(dir $(C_SOURCES)))# list of ASM program objectsOBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES:.s=.o)))vpath %.s $(sort $(dir $(ASM_SOURCES)))$(BUILD_DIR)/%.o: %.c Makefile | $(BUILD_DIR)$(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@$(BUILD_DIR)/%.o: %.s Makefile | $(BUILD_DIR)$(AS) -c $(CFLAGS) $< -o $@$(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile$(CC) $(OBJECTS) $(LDFLAGS) -o $@$(SZ) $@$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR)$(HEX) $< $@$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR)$(BIN) $< $@$(BUILD_DIR):mkdir $@######################################## clean up#######################################clean:-rm -fR $(BUILD_DIR)######################################## dependencies#######################################-include $(wildcard $(BUILD_DIR)/*.d)# *** EOF ***
/********************************************************************************* @file startup_stm32f407xx.s* @author MCD Application Team* @brief STM32F407xx Devices vector table for GCC based toolchains.* This module performs:* - Set the initial SP* - Set the initial PC == Reset_Handler,* - Set the vector table entries with the exceptions ISR address* - Branches to main in the C library (which eventually* calls main()).* After Reset the Cortex-M4 processor is in Thread mode,* priority is Privileged, and the Stack is set to Main.******************************************************************************* @attention** Copyright (c) 2017 STMicroelectronics.* All rights reserved.** This software is licensed under terms that can be found in the LICENSE file* in the root directory of this software component.* If no LICENSE file comes with this software, it is provided AS-IS.********************************************************************************/.syntax unified.cpu cortex-m4.fpu softvfp.thumb.global g_pfnVectors.global Default_Handler/* start address for the initialization values of the .data section.defined in linker script */.word _sidata/* start address for the .data section. defined in linker script */.word _sdata/* end address for the .data section. defined in linker script */.word _edata/* start address for the .bss section. defined in linker script */.word _sbss/* end address for the .bss section. defined in linker script */.word _ebss/* stack used for SystemInit_ExtMemCtl; always internal RAM used *//*** @brief This is the code that gets called when the processor first* starts execution following a reset event. Only the absolutely* necessary set is performed, after which the application* supplied main() routine is called.* @param None* @retval : None*/.section .text.Reset_Handler.weak Reset_Handler.type Reset_Handler, %functionReset_Handler:ldr sp, =_estack /* set stack pointer *//* Copy the data segment initializers from flash to SRAM */ldr r0, =_sdataldr r1, =_edataldr r2, =_sidatamovs r3, #0b LoopCopyDataInitCopyDataInit:ldr r4, [r2, r3]str r4, [r0, r3]adds r3, r3, #4LoopCopyDataInit:adds r4, r0, r3cmp r4, r1bcc CopyDataInit/* Zero fill the bss segment. */ldr r2, =_sbssldr r4, =_ebssmovs r3, #0b LoopFillZerobssFillZerobss:str r3, [r2]adds r2, r2, #4LoopFillZerobss:cmp r2, r4bcc FillZerobss/* Call the clock system initialization function.*/bl SystemInit/* Call static constructors */bl __libc_init_array/* Call the application's entry point.*/bl mainbx lr.size Reset_Handler, .-Reset_Handler/*** @brief This is the code that gets called when the processor receives an* unexpected interrupt. This simply enters an infinite loop, preserving* the system state for examination by a debugger.* @param None* @retval None*/.section .text.Default_Handler,"ax",%progbitsDefault_Handler:Infinite_Loop:b Infinite_Loop.size Default_Handler, .-Default_Handler/******************************************************************************** The minimal vector table for a Cortex M3. Note that the proper constructs* must be placed on this to ensure that it ends up at physical address* 0x0000.0000.********************************************************************************/.section .isr_vector,"a",%progbits.type g_pfnVectors, %object.size g_pfnVectors, .-g_pfnVectorsg_pfnVectors:.word _estack.word Reset_Handler.word NMI_Handler.word HardFault_Handler.word MemManage_Handler.word BusFault_Handler.word UsageFault_Handler.word 0.word 0.word 0.word 0.word SVC_Handler.word DebugMon_Handler.word 0.word PendSV_Handler.word SysTick_Handler/* External Interrupts */.word WWDG_IRQHandler /* Window WatchDog */.word PVD_IRQHandler /* PVD through EXTI Line detection */.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */.word FLASH_IRQHandler /* FLASH */.word RCC_IRQHandler /* RCC */.word EXTI0_IRQHandler /* EXTI Line0 */.word EXTI1_IRQHandler /* EXTI Line1 */.word EXTI2_IRQHandler /* EXTI Line2 */.word EXTI3_IRQHandler /* EXTI Line3 */.word EXTI4_IRQHandler /* EXTI Line4 */.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */.word CAN1_TX_IRQHandler /* CAN1 TX */.word CAN1_RX0_IRQHandler /* CAN1 RX0 */.word CAN1_RX1_IRQHandler /* CAN1 RX1 */.word CAN1_SCE_IRQHandler /* CAN1 SCE */.word EXTI9_5_IRQHandler /* External Line[9:5]s */.word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */.word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */.word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */.word TIM2_IRQHandler /* TIM2 */.word TIM3_IRQHandler /* TIM3 */.word TIM4_IRQHandler /* TIM4 */.word I2C1_EV_IRQHandler /* I2C1 Event */.word I2C1_ER_IRQHandler /* I2C1 Error */.word I2C2_EV_IRQHandler /* I2C2 Event */.word I2C2_ER_IRQHandler /* I2C2 Error */.word SPI1_IRQHandler /* SPI1 */.word SPI2_IRQHandler /* SPI2 */.word USART1_IRQHandler /* USART1 */.word USART2_IRQHandler /* USART2 */.word USART3_IRQHandler /* USART3 */.word EXTI15_10_IRQHandler /* External Line[15:10]s */.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */.word FSMC_IRQHandler /* FSMC */.word SDIO_IRQHandler /* SDIO */.word TIM5_IRQHandler /* TIM5 */.word SPI3_IRQHandler /* SPI3 */.word UART4_IRQHandler /* UART4 */.word UART5_IRQHandler /* UART5 */.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */.word TIM7_IRQHandler /* TIM7 */.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */.word ETH_IRQHandler /* Ethernet */.word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */.word CAN2_TX_IRQHandler /* CAN2 TX */.word CAN2_RX0_IRQHandler /* CAN2 RX0 */.word CAN2_RX1_IRQHandler /* CAN2 RX1 */.word CAN2_SCE_IRQHandler /* CAN2 SCE */.word OTG_FS_IRQHandler /* USB OTG FS */.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */.word USART6_IRQHandler /* USART6 */.word I2C3_EV_IRQHandler /* I2C3 event */.word I2C3_ER_IRQHandler /* I2C3 error */.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */.word OTG_HS_IRQHandler /* USB OTG HS */.word DCMI_IRQHandler /* DCMI */.word 0 /* CRYP crypto */.word HASH_RNG_IRQHandler /* Hash and Rng */.word FPU_IRQHandler /* FPU *//********************************************************************************* Provide weak aliases for each Exception handler to the Default_Handler.* As they are weak aliases, any function with the same name will override* this definition.********************************************************************************/.weak NMI_Handler.thumb_set NMI_Handler,Default_Handler.weak HardFault_Handler.thumb_set HardFault_Handler,Default_Handler.weak MemManage_Handler.thumb_set MemManage_Handler,Default_Handler.weak BusFault_Handler.thumb_set BusFault_Handler,Default_Handler.weak UsageFault_Handler.thumb_set UsageFault_Handler,Default_Handler.weak SVC_Handler.thumb_set SVC_Handler,Default_Handler.weak DebugMon_Handler.thumb_set DebugMon_Handler,Default_Handler.weak PendSV_Handler.thumb_set PendSV_Handler,Default_Handler.weak SysTick_Handler.thumb_set SysTick_Handler,Default_Handler.weak WWDG_IRQHandler.thumb_set WWDG_IRQHandler,Default_Handler.weak PVD_IRQHandler.thumb_set PVD_IRQHandler,Default_Handler.weak TAMP_STAMP_IRQHandler.thumb_set TAMP_STAMP_IRQHandler,Default_Handler.weak RTC_WKUP_IRQHandler.thumb_set RTC_WKUP_IRQHandler,Default_Handler.weak FLASH_IRQHandler.thumb_set FLASH_IRQHandler,Default_Handler.weak RCC_IRQHandler.thumb_set RCC_IRQHandler,Default_Handler.weak EXTI0_IRQHandler.thumb_set EXTI0_IRQHandler,Default_Handler.weak EXTI1_IRQHandler.thumb_set EXTI1_IRQHandler,Default_Handler.weak EXTI2_IRQHandler.thumb_set EXTI2_IRQHandler,Default_Handler.weak EXTI3_IRQHandler.thumb_set EXTI3_IRQHandler,Default_Handler.weak EXTI4_IRQHandler.thumb_set EXTI4_IRQHandler,Default_Handler.weak DMA1_Stream0_IRQHandler.thumb_set DMA1_Stream0_IRQHandler,Default_Handler.weak DMA1_Stream1_IRQHandler.thumb_set DMA1_Stream1_IRQHandler,Default_Handler.weak DMA1_Stream2_IRQHandler.thumb_set DMA1_Stream2_IRQHandler,Default_Handler.weak DMA1_Stream3_IRQHandler.thumb_set DMA1_Stream3_IRQHandler,Default_Handler.weak DMA1_Stream4_IRQHandler.thumb_set DMA1_Stream4_IRQHandler,Default_Handler.weak DMA1_Stream5_IRQHandler.thumb_set DMA1_Stream5_IRQHandler,Default_Handler.weak DMA1_Stream6_IRQHandler.thumb_set DMA1_Stream6_IRQHandler,Default_Handler.weak ADC_IRQHandler.thumb_set ADC_IRQHandler,Default_Handler.weak CAN1_TX_IRQHandler.thumb_set CAN1_TX_IRQHandler,Default_Handler.weak CAN1_RX0_IRQHandler.thumb_set CAN1_RX0_IRQHandler,Default_Handler.weak CAN1_RX1_IRQHandler.thumb_set CAN1_RX1_IRQHandler,Default_Handler.weak CAN1_SCE_IRQHandler.thumb_set CAN1_SCE_IRQHandler,Default_Handler.weak EXTI9_5_IRQHandler.thumb_set EXTI9_5_IRQHandler,Default_Handler.weak TIM1_BRK_TIM9_IRQHandler.thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler.weak TIM1_UP_TIM10_IRQHandler.thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler.weak TIM1_TRG_COM_TIM11_IRQHandler.thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler.weak TIM1_CC_IRQHandler.thumb_set TIM1_CC_IRQHandler,Default_Handler.weak TIM2_IRQHandler.thumb_set TIM2_IRQHandler,Default_Handler.weak TIM3_IRQHandler.thumb_set TIM3_IRQHandler,Default_Handler.weak TIM4_IRQHandler.thumb_set TIM4_IRQHandler,Default_Handler.weak I2C1_EV_IRQHandler.thumb_set I2C1_EV_IRQHandler,Default_Handler.weak I2C1_ER_IRQHandler.thumb_set I2C1_ER_IRQHandler,Default_Handler.weak I2C2_EV_IRQHandler.thumb_set I2C2_EV_IRQHandler,Default_Handler.weak I2C2_ER_IRQHandler.thumb_set I2C2_ER_IRQHandler,Default_Handler.weak SPI1_IRQHandler.thumb_set SPI1_IRQHandler,Default_Handler.weak SPI2_IRQHandler.thumb_set SPI2_IRQHandler,Default_Handler.weak USART1_IRQHandler.thumb_set USART1_IRQHandler,Default_Handler.weak USART2_IRQHandler.thumb_set USART2_IRQHandler,Default_Handler.weak USART3_IRQHandler.thumb_set USART3_IRQHandler,Default_Handler.weak EXTI15_10_IRQHandler.thumb_set EXTI15_10_IRQHandler,Default_Handler.weak RTC_Alarm_IRQHandler.thumb_set RTC_Alarm_IRQHandler,Default_Handler.weak OTG_FS_WKUP_IRQHandler.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler.weak TIM8_BRK_TIM12_IRQHandler.thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler.weak TIM8_UP_TIM13_IRQHandler.thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler.weak TIM8_TRG_COM_TIM14_IRQHandler.thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler.weak TIM8_CC_IRQHandler.thumb_set TIM8_CC_IRQHandler,Default_Handler.weak DMA1_Stream7_IRQHandler.thumb_set DMA1_Stream7_IRQHandler,Default_Handler.weak FSMC_IRQHandler.thumb_set FSMC_IRQHandler,Default_Handler.weak SDIO_IRQHandler.thumb_set SDIO_IRQHandler,Default_Handler.weak TIM5_IRQHandler.thumb_set TIM5_IRQHandler,Default_Handler.weak SPI3_IRQHandler.thumb_set SPI3_IRQHandler,Default_Handler.weak UART4_IRQHandler.thumb_set UART4_IRQHandler,Default_Handler.weak UART5_IRQHandler.thumb_set UART5_IRQHandler,Default_Handler.weak TIM6_DAC_IRQHandler.thumb_set TIM6_DAC_IRQHandler,Default_Handler.weak TIM7_IRQHandler.thumb_set TIM7_IRQHandler,Default_Handler.weak DMA2_Stream0_IRQHandler.thumb_set DMA2_Stream0_IRQHandler,Default_Handler.weak DMA2_Stream1_IRQHandler.thumb_set DMA2_Stream1_IRQHandler,Default_Handler.weak DMA2_Stream2_IRQHandler.thumb_set DMA2_Stream2_IRQHandler,Default_Handler.weak DMA2_Stream3_IRQHandler.thumb_set DMA2_Stream3_IRQHandler,Default_Handler.weak DMA2_Stream4_IRQHandler.thumb_set DMA2_Stream4_IRQHandler,Default_Handler.weak ETH_IRQHandler.thumb_set ETH_IRQHandler,Default_Handler.weak ETH_WKUP_IRQHandler.thumb_set ETH_WKUP_IRQHandler,Default_Handler.weak CAN2_TX_IRQHandler.thumb_set CAN2_TX_IRQHandler,Default_Handler.weak CAN2_RX0_IRQHandler.thumb_set CAN2_RX0_IRQHandler,Default_Handler.weak CAN2_RX1_IRQHandler.thumb_set CAN2_RX1_IRQHandler,Default_Handler.weak CAN2_SCE_IRQHandler.thumb_set CAN2_SCE_IRQHandler,Default_Handler.weak OTG_FS_IRQHandler.thumb_set OTG_FS_IRQHandler,Default_Handler.weak DMA2_Stream5_IRQHandler.thumb_set DMA2_Stream5_IRQHandler,Default_Handler.weak DMA2_Stream6_IRQHandler.thumb_set DMA2_Stream6_IRQHandler,Default_Handler.weak DMA2_Stream7_IRQHandler.thumb_set DMA2_Stream7_IRQHandler,Default_Handler.weak USART6_IRQHandler.thumb_set USART6_IRQHandler,Default_Handler.weak I2C3_EV_IRQHandler.thumb_set I2C3_EV_IRQHandler,Default_Handler.weak I2C3_ER_IRQHandler.thumb_set I2C3_ER_IRQHandler,Default_Handler.weak OTG_HS_EP1_OUT_IRQHandler.thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler.weak OTG_HS_EP1_IN_IRQHandler.thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler.weak OTG_HS_WKUP_IRQHandler.thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler.weak OTG_HS_IRQHandler.thumb_set OTG_HS_IRQHandler,Default_Handler.weak DCMI_IRQHandler.thumb_set DCMI_IRQHandler,Default_Handler.weak HASH_RNG_IRQHandler.thumb_set HASH_RNG_IRQHandler,Default_Handler.weak FPU_IRQHandler.thumb_set FPU_IRQHandler,Default_Handler
/*********************************************************************************** File : LinkerScript.ld**** Author : STM32CubeMX**** Abstract : Linker script for STM32F407VETx series** 512Kbytes FLASH and 192Kbytes RAM**** Set heap size, stack size and stack location according** to application requirements.**** Set memory bank area and size if external memory is used.**** Target : STMicroelectronics STM32**** Distribution: The file is distributed “as is,” without any warranty** of any kind.********************************************************************************* @attention**** <h2><center>© COPYRIGHT(c) 2019 STMicroelectronics</center></h2>**** Redistribution and use in source and binary forms, with or without modification,** are permitted provided that the following conditions are met:** 1. Redistributions of source code must retain the above copyright notice,** this list of conditions and the following disclaimer.** 2. Redistributions in binary form must reproduce the above copyright notice,** this list of conditions and the following disclaimer in the documentation** and/or other materials provided with the distribution.** 3. Neither the name of STMicroelectronics nor the names of its contributors** may be used to endorse or promote products derived from this software** without specific prior written permission.**** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.********************************************************************************//* Entry Point */ENTRY(Reset_Handler)/* Highest address of the user mode stack */_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of RAM *//* Generate a link error if heap and stack don't fit into RAM */_Min_Heap_Size = 0x200; /* required amount of heap */_Min_Stack_Size = 0x400; /* required amount of stack *//* Specify the memory areas */MEMORY{RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128KCCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64KFLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K}/* Define output sections */SECTIONS{/* The startup code goes first into FLASH */.isr_vector :{. = ALIGN(4);KEEP(*(.isr_vector)) /* Startup code */. = ALIGN(4);} >FLASH/* The program code and other data goes into FLASH */.text :{. = ALIGN(4);*(.text) /* .text sections (code) */*(.text*) /* .text* sections (code) */*(.glue_7) /* glue arm to thumb code */*(.glue_7t) /* glue thumb to arm code */*(.eh_frame)KEEP (*(.init))KEEP (*(.fini)). = ALIGN(4);_etext = .; /* define a global symbols at end of code */} >FLASH/* Constant data goes into FLASH */.rodata :{. = ALIGN(4);*(.rodata) /* .rodata sections (constants, strings, etc.) */*(.rodata*) /* .rodata* sections (constants, strings, etc.) */. = ALIGN(4);} >FLASH.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH.ARM : {__exidx_start = .;*(.ARM.exidx*)__exidx_end = .;} >FLASH.preinit_array :{PROVIDE_HIDDEN (__preinit_array_start = .);KEEP (*(.preinit_array*))PROVIDE_HIDDEN (__preinit_array_end = .);} >FLASH.init_array :{PROVIDE_HIDDEN (__init_array_start = .);KEEP (*(SORT(.init_array.*)))KEEP (*(.init_array*))PROVIDE_HIDDEN (__init_array_end = .);} >FLASH.fini_array :{PROVIDE_HIDDEN (__fini_array_start = .);KEEP (*(SORT(.fini_array.*)))KEEP (*(.fini_array*))PROVIDE_HIDDEN (__fini_array_end = .);} >FLASH/* used by the startup to initialize data */_sidata = LOADADDR(.data);/* Initialized data sections goes into RAM, load LMA copy after code */.data :{. = ALIGN(4);_sdata = .; /* create a global symbol at data start */*(.data) /* .data sections */*(.data*) /* .data* sections */. = ALIGN(4);_edata = .; /* define a global symbol at data end */} >RAM AT> FLASH_siccmram = LOADADDR(.ccmram);/* CCM-RAM section** IMPORTANT NOTE!* If initialized variables will be placed in this section,* the startup code needs to be modified to copy the init-values.*/.ccmram :{. = ALIGN(4);_sccmram = .; /* create a global symbol at ccmram start */*(.ccmram)*(.ccmram*). = ALIGN(4);_eccmram = .; /* create a global symbol at ccmram end */} >CCMRAM AT> FLASH/* Uninitialized data section */. = ALIGN(4);.bss :{/* This is used by the startup in order to initialize the .bss secion */_sbss = .; /* define a global symbol at bss start */__bss_start__ = _sbss;*(.bss)*(.bss*)*(COMMON). = ALIGN(4);_ebss = .; /* define a global symbol at bss end */__bss_end__ = _ebss;} >RAM/* User_heap_stack section, used to check that there is enough RAM left */._user_heap_stack :{. = ALIGN(8);PROVIDE ( end = . );PROVIDE ( _end = . );. = . + _Min_Heap_Size;. = . + _Min_Stack_Size;. = ALIGN(8);} >RAM/* Remove information from the standard libraries *//DISCARD/ :{libc.a ( * )libm.a ( * )libgcc.a ( * )}.ARM.attributes 0 : { *(.ARM.attributes) }}
/********************************************************************************* @file stm32f4xx.h* @author MCD Application Team* @brief CMSIS STM32F4xx Device Peripheral Access Layer Header File.** The file is the unique include file that the application programmer* is using in the C source code, usually in main.c. This file contains:* - Configuration section that allows to select:* - The STM32F4xx device used in the target application* - To use or not the peripheral's drivers in application code(i.e.* code will be based on direct access to peripheral's registers* rather than drivers API), this option is controlled by* "#define USE_HAL_DRIVER"******************************************************************************** @attention** Copyright (c) 2017 STMicroelectronics.* All rights reserved.** This software is licensed under terms that can be found in the LICENSE file* in the root directory of this software component.* If no LICENSE file comes with this software, it is provided AS-IS.********************************************************************************//** @addtogroup CMSIS* @{*//** @addtogroup stm32f4xx* @{*/#ifndef __STM32F4xx_H#define __STM32F4xx_H#ifdef __cplusplusextern "C" {#endif /* __cplusplus *//** @addtogroup Library_configuration_section* @{*//*** @brief STM32 Family*/#if !defined (STM32F4)#define STM32F4#endif /* STM32F4 *//* Uncomment the line below according to the target STM32 device used in yourapplication*/#if !defined (STM32F405xx) && !defined (STM32F415xx) && !defined (STM32F407xx) && !defined (STM32F417xx) && \!defined (STM32F427xx) && !defined (STM32F437xx) && !defined (STM32F429xx) && !defined (STM32F439xx) && \!defined (STM32F401xC) && !defined (STM32F401xE) && !defined (STM32F410Tx) && !defined (STM32F410Cx) && \!defined (STM32F410Rx) && !defined (STM32F411xE) && !defined (STM32F446xx) && !defined (STM32F469xx) && \!defined (STM32F479xx) && !defined (STM32F412Cx) && !defined (STM32F412Rx) && !defined (STM32F412Vx) && \!defined (STM32F412Zx) && !defined (STM32F413xx) && !defined (STM32F423xx)/* #define STM32F405xx */ /*!< STM32F405RG, STM32F405VG and STM32F405ZG Devices *//* #define STM32F415xx */ /*!< STM32F415RG, STM32F415VG and STM32F415ZG Devices *//* #define STM32F407xx */ /*!< STM32F407VG, STM32F407VE, STM32F407ZG, STM32F407ZE, STM32F407IG and STM32F407IE Devices *//* #define STM32F417xx */ /*!< STM32F417VG, STM32F417VE, STM32F417ZG, STM32F417ZE, STM32F417IG and STM32F417IE Devices *//* #define STM32F427xx */ /*!< STM32F427VG, STM32F427VI, STM32F427ZG, STM32F427ZI, STM32F427IG and STM32F427II Devices *//* #define STM32F437xx */ /*!< STM32F437VG, STM32F437VI, STM32F437ZG, STM32F437ZI, STM32F437IG and STM32F437II Devices *//* #define STM32F429xx */ /*!< STM32F429VG, STM32F429VI, STM32F429ZG, STM32F429ZI, STM32F429BG, STM32F429BI, STM32F429NG,STM32F439NI, STM32F429IG and STM32F429II Devices *//* #define STM32F439xx */ /*!< STM32F439VG, STM32F439VI, STM32F439ZG, STM32F439ZI, STM32F439BG, STM32F439BI, STM32F439NG,STM32F439NI, STM32F439IG and STM32F439II Devices *//* #define STM32F401xC */ /*!< STM32F401CB, STM32F401CC, STM32F401RB, STM32F401RC, STM32F401VB and STM32F401VC Devices *//* #define STM32F401xE */ /*!< STM32F401CD, STM32F401RD, STM32F401VD, STM32F401CE, STM32F401RE and STM32F401VE Devices *//* #define STM32F410Tx */ /*!< STM32F410T8 and STM32F410TB Devices *//* #define STM32F410Cx */ /*!< STM32F410C8 and STM32F410CB Devices *//* #define STM32F410Rx */ /*!< STM32F410R8 and STM32F410RB Devices *//* #define STM32F411xE */ /*!< STM32F411CC, STM32F411RC, STM32F411VC, STM32F411CE, STM32F411RE and STM32F411VE Devices *//* #define STM32F446xx */ /*!< STM32F446MC, STM32F446ME, STM32F446RC, STM32F446RE, STM32F446VC, STM32F446VE, STM32F446ZC,and STM32F446ZE Devices *//* #define STM32F469xx */ /*!< STM32F469AI, STM32F469II, STM32F469BI, STM32F469NI, STM32F469AG, STM32F469IG, STM32F469BG,STM32F469NG, STM32F469AE, STM32F469IE, STM32F469BE and STM32F469NE Devices *//* #define STM32F479xx */ /*!< STM32F479AI, STM32F479II, STM32F479BI, STM32F479NI, STM32F479AG, STM32F479IG, STM32F479BGand STM32F479NG Devices *//* #define STM32F412Cx */ /*!< STM32F412CEU and STM32F412CGU Devices *//* #define STM32F412Zx */ /*!< STM32F412ZET, STM32F412ZGT, STM32F412ZEJ and STM32F412ZGJ Devices *//* #define STM32F412Vx */ /*!< STM32F412VET, STM32F412VGT, STM32F412VEH and STM32F412VGH Devices *//* #define STM32F412Rx */ /*!< STM32F412RET, STM32F412RGT, STM32F412REY and STM32F412RGY Devices *//* #define STM32F413xx */ /*!< STM32F413CH, STM32F413MH, STM32F413RH, STM32F413VH, STM32F413ZH, STM32F413CG, STM32F413MG,STM32F413RG, STM32F413VG and STM32F413ZG Devices *//* #define STM32F423xx */ /*!< STM32F423CH, STM32F423RH, STM32F423VH and STM32F423ZH Devices */#endif/* Tip: To avoid modifying this file each time you need to switch between thesedevices, you can define the device in your toolchain compiler preprocessor.*/#if !defined (USE_HAL_DRIVER)/*** @brief Comment the line below if you will not use the peripherals drivers.In this case, these drivers will not be included and the application code willbe based on direct access to peripherals registers*//*#define USE_HAL_DRIVER */#endif /* USE_HAL_DRIVER *//*** @brief CMSIS version number V2.6.8*/#define __STM32F4xx_CMSIS_VERSION_MAIN (0x02U) /*!< [31:24] main version */#define __STM32F4xx_CMSIS_VERSION_SUB1 (0x06U) /*!< [23:16] sub1 version */#define __STM32F4xx_CMSIS_VERSION_SUB2 (0x08U) /*!< [15:8] sub2 version */#define __STM32F4xx_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */#define __STM32F4xx_CMSIS_VERSION ((__STM32F4xx_CMSIS_VERSION_MAIN << 24)\|(__STM32F4xx_CMSIS_VERSION_SUB1 << 16)\|(__STM32F4xx_CMSIS_VERSION_SUB2 << 8 )\|(__STM32F4xx_CMSIS_VERSION_RC))/*** @}*//** @addtogroup Device_Included* @{*/#if defined(STM32F405xx)#include "stm32f405xx.h"#elif defined(STM32F415xx)#include "stm32f415xx.h"#elif defined(STM32F407xx)#include "stm32f407xx.h"#elif defined(STM32F417xx)#include "stm32f417xx.h"#elif defined(STM32F427xx)#include "stm32f427xx.h"#elif defined(STM32F437xx)#include "stm32f437xx.h"#elif defined(STM32F429xx)#include "stm32f429xx.h"#elif defined(STM32F439xx)#include "stm32f439xx.h"#elif defined(STM32F401xC)#include "stm32f401xc.h"#elif defined(STM32F401xE)#include "stm32f401xe.h"#elif defined(STM32F410Tx)#include "stm32f410tx.h"#elif defined(STM32F410Cx)#include "stm32f410cx.h"#elif defined(STM32F410Rx)#include "stm32f410rx.h"#elif defined(STM32F411xE)#include "stm32f411xe.h"#elif defined(STM32F446xx)#include "stm32f446xx.h"#elif defined(STM32F469xx)#include "stm32f469xx.h"#elif defined(STM32F479xx)#include "stm32f479xx.h"#elif defined(STM32F412Cx)#include "stm32f412cx.h"#elif defined(STM32F412Zx)#include "stm32f412zx.h"#elif defined(STM32F412Rx)#include "stm32f412rx.h"#elif defined(STM32F412Vx)#include "stm32f412vx.h"#elif defined(STM32F413xx)#include "stm32f413xx.h"#elif defined(STM32F423xx)#include "stm32f423xx.h"#else#error "Please select first the target STM32F4xx device used in your application (in stm32f4xx.h file)"#endif/*** @}*//** @addtogroup Exported_types* @{*/typedef enum{RESET = 0U,SET = !RESET} FlagStatus, ITStatus;typedef enum{DISABLE = 0U,ENABLE = !DISABLE} FunctionalState;#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))typedef enum{SUCCESS = 0U,ERROR = !SUCCESS} ErrorStatus;/*** @}*//** @addtogroup Exported_macro* @{*/#define SET_BIT(REG, BIT) ((REG) |= (BIT))#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))#define READ_BIT(REG, BIT) ((REG) & (BIT))#define CLEAR_REG(REG) ((REG) = (0x0))#define WRITE_REG(REG, VAL) ((REG) = (VAL))#define READ_REG(REG) ((REG))#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))/* Use of CMSIS compiler intrinsics for register exclusive access *//* Atomic 32-bit register access macro to set one or several bits */#define ATOMIC_SET_BIT(REG, BIT) \do { \uint32_t val; \do { \val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \} while(0)/* Atomic 32-bit register access macro to clear one or several bits */#define ATOMIC_CLEAR_BIT(REG, BIT) \do { \uint32_t val; \do { \val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \} while(0)/* Atomic 32-bit register access macro to clear and set one or several bits */#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \do { \uint32_t val; \do { \val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \} while(0)/* Atomic 16-bit register access macro to set one or several bits */#define ATOMIC_SETH_BIT(REG, BIT) \do { \uint16_t val; \do { \val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \} while(0)/* Atomic 16-bit register access macro to clear one or several bits */#define ATOMIC_CLEARH_BIT(REG, BIT) \do { \uint16_t val; \do { \val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \} while(0)/* Atomic 16-bit register access macro to clear and set one or several bits */#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \do { \uint16_t val; \do { \val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \} while(0)/*** @}*/#if defined (USE_HAL_DRIVER)#include "stm32f4xx_hal.h"#endif /* USE_HAL_DRIVER */#ifdef __cplusplus}#endif /* __cplusplus */#endif /* __STM32F4xx_H *//*** @}*//*** @}*/
Shift+Ctrl+p(C/C++配置)后生成的c_cpp_properties.json文件
{"configurations": [{"name": "Win32","includePath": ["${workspaceFolder}/**"],"defines": ["_DEBUG","UNICODE","_UNICODE","USE_HAL_DRIVER",//可以修改(makefile c defines中的)"STM32F407xx"//可以修改(makefile c defines中的)],"windowsSdkVersion": "10.0.19041.0","compilerPath": "D:/vs studio/SDK/VC/Tools/MSVC/14.32.31326/bin/Hostx64/x64/cl.exe","cStandard": "c17","cppStandard": "c++17","intelliSenseMode": "gcc-arm"//可以修改}],"version": 4}
添加settings.json
{"makefile.extensionOutputFolder": "./.vscode"}
{"tasks": [{"type": "cppbuild","label": "C/C++: gcc.exe 生成活动文件","command": "D:/LearnApp/SDK/C/Feil/mingw64/bin/gcc.exe","args": ["-fdiagnostics-color=always","-g","${file}","-o","${fileDirname}\\${fileBasenameNoExtension}.exe"],"options": {"cwd": "D:/LearnApp/SDK/C/Feil/mingw64/bin"},"problemMatcher": ["$gcc"],"group": {"kind": "build","isDefault": true},"detail": "调试器生成的任务。"},//按照以上格式添加这段{"type": "shell",//类型"label": "Update", //运行任务中的名称"command": "D:/IOT/STM32/File/openocd-0.10.0/bin/openocd.exe", //执行的命令"args": ["-f", //文件"D:/IOT/STM32/File/openocd-0.10.0/scripts/interface/jlink-swd.cfg","-f","D:/IOT/STM32/File/openocd-0.10.0/scripts/target/stm32f4x.cfg","-c","program build/401CEU6fist.elf verify reset exit" //build/401CEU6fist.elf: 是你build里面的.elf文件名称和build路径],"problemMatcher": ["$gcc"],"group": {"kind": "build","isDefault": true},"detail": "调试器生成的任务。"},//按照最上面的格式添加这段{"type": "shell",//类型"label": "Build",//运行任务中的名称"command": "make",//执行的命令(需要在环境依赖中有配置)"args": [],"problemMatcher": ["$gcc"],"group": {"kind": "build","isDefault": true},"detail": "调试器生成的任务。"}],"version": "2.0.0"}
之后再写代码:
#include "main.h"int main(){volatile unsigned int* pointer;//指针return 0;}
int main(){
unsigned int pointer;//指针
pointer += 1;
pointer += 2;
pointer += 3; //优化后直接+3,可能会与先+1，再+2的产生效果不一致
return 0;
}
```c#ifndef __MAIN_H#define __MAIN_H#ifdef __cplusplusextern "C"{#endif//什么都没有#ifdef __cplusplus}#endif#endif
#include "main.h"int main(){volatile unsigned int* pointer1 = (unsigned int *)0x40022000;return 0;}
这样子就指向了我们寄存器中的地址
若有收获，就点个赞吧
0 人点赞
